1. Technical Field
The present invention relates to an electronic component and a method for producing the same.
2. Related Art
A method for producing an electronic component in related art will be described with reference to FIGS. 12A to 12D, 13A to 13D, and 14. FIGS. 12A to 12D, 13A to 13D, and 14 are cross-sectional views illustrating the method for producing an electronic component in related art.
As shown in FIG. 12A, an electrode pad 111 is formed on a semiconductor substrate 101, and a passivation film 112 is formed on the entire surface including the electrode pad 111. Then, an opening portion that is located on the electrode pad 111 is formed in the passivation film 112.
Next, as shown in FIG. 12B, a photosensitive polyimide film is provided above the semiconductor substrate 101 having the electrode pad 111 and the passivation film 112, and is exposed and developed. Thus, a resin layer 113 constituted by the polyimide film is formed on the passivation film 112. Then, as shown in FIG. 12C, a resin projection (core resin) 102 is formed above the semiconductor substrate 101 by curing the resin layer 113.
Thereafter, as shown in FIG. 12D, a TiW layer 114 (or a laminated film of a TiW layer and a Ti layer) is formed on the electrode pad 111, the passivation film 112 and the core resin 102 by sputtering. Then, an Au layer 115 is formed on the TiW layer 114 by sputtering.
Next, as shown in FIG. 13A, a photoresist film is provided on the Au layer 115, and is exposed and developed, thus a resist pattern 116 is formed on the Au layer. Then, as shown in FIG. 13B, wet etching is performed on the Au layer 115 using the resist pattern 116 as a mask.
Next, as shown in FIG. 13C, the resist pattern 116 is removed. Then, as shown in FIG. 13D, a wiring layer 103 including the TiW layer 114 and the Au layer 115 is formed by etching the TiW layer 114 using the Au layer 115 as a mask. This wiring layer 103 is electrically connected to the electrode pad 111, and lies above the core resin 102 (see JP-A-2007-12678, for example).
Next, as shown in FIG. 14, a mounting substrate 104 is prepared that includes an electrode (joining target electrode 106) to be joined to the wiring layer 103 lying above the core resin 102 of the semiconductor substrate 101. Then, the semiconductor substrate 101 and the mounting substrate 104 are aligned such that the wiring layer 103 on the core resin 102 and the joining target electrode 106 are opposed to each other. Next, the wiring layer 103 on the core resin 102 is joined to the joining target electrode 106 by applying loads to the semiconductor substrate 101 and the mounting substrate 104. Accordingly, the semiconductor substrate 101 is mounted on the mounting substrate 104.
Incidentally, at least one of the semiconductor substrate 101 and the mounting substrate 104 may be warped. In particular, the thinner the semiconductor substrate 101 and the mounting substrate 104 are, the more likely they are to be warped. If warping occurs in this manner, the distance between the wiring layer 103 on the core resin 102 and the joining target electrode 106 varies. Therefore, it is necessary to increase the height of the core resin 102 in order to realize highly reliable joining.
Meanwhile, the core resin 102 is formed so as to have a height of 13 to 14 μm, in general, and the upper limit of the thickness of the core resin 102 is about 24 to 25 μm. This is because there is a limitation on the maximum thickness due to the properties (viscosity, resolution) of polyimide to be used in the single-layer core resin 102.
When the thickness of the core resin 102 is increased, a step is formed between the core resin 102 and the passivation film 112, which is an underlying film of the core resin 102. Therefore, when forming the wiring layer 103, such as Au wiring, lying above the core resin 102, the thickness of the photoresist film for covering the step of the thick core resin 102 also needs to be increased, and accordingly high coverage properties are required. If the coverage properties are poor, the reliability of the resist pattern after the development will be deteriorated, and as a result, the reliability of the wiring layer 103 will be deteriorated. Accordingly, the wiring layer 103 may be broken at a step portion 105 of the core resin 102 due to stress generated during mounting.
JP-A-2007-12678 is an example of related art.